The invention is directed to the field of lithographic projection apparatus that encompass a radiation system for supplying a projection beam of radiation, a support structure for supporting a patterning device, which serves to pattern the projection beam according to a desired pattern, a substrate table for holding a substrate; and, a projection system for projecting the patterned beam onto a target portion of the substrate.
The term “patterning device” as employed here should be broadly interpreted as referring to devices that can be used to endow an incoming radiation beam with a patterned cross-section, corresponding to a pattern that is to be created in a target portion of the substrate. The term “light valve” can also be used in this context. Generally, the pattern will correspond to a particular functional layer in a device being created in the target portion, such as an integrated circuit or other device. Examples of such patterning devices include:                A mask. The concept of a mask is well known in lithography and it includes mask types such as binary, alternating phase-shift, and attenuated phase-shift, as well as various hybrid mask types. Placement of such a mask in the radiation beam causes selective transmission (in the case of a transmission mask) or reflection (in the case of a reflective mask) of the radiation impinging on the mask, according to the pattern on the mask. In the case of a mask, the support structure will generally be a mask table, which ensures that the mask can be held at a desired position in the incoming radiation beam, and that it can be moved relative to the beam if so desired;        A programmable mirror array. One example of such a device is a matrix-addressable surface having a visco-elastic control layer and a reflective surface. The basic principle behind such an apparatus is that addressed areas of the reflective surface reflect incident light as diffracted light, for example, whereas unaddressed areas reflect incident light as non-diffracted light. Using an appropriate filter, the non-diffracted light can be filtered out of the reflected beam leaving only the diffracted light behind. In this manner, the beam becomes patterned according to the addressing pattern of the matrix-addressable surface. An alternative embodiment of a programmable mirror array employs a matrix arrangement of tiny mirrors, each of which can be individually tilted about an axis by applying a suitable localized electric field or by employing piezoelectric actuators. Once again, the mirrors are matrix-addressable, such that addressed mirrors will reflect an incoming radiation beam in a different direction to unaddressed mirrors. In this manner, the reflected beam is patterned according to the addressing pattern of the matrix-addressable mirrors. The required matrix addressing can be performed using suitable electronic circuitry.        
In both of the situations described here above, the patterning device can comprise one or more programmable mirror arrays. More information on mirror arrays as here referred to can be gleaned, for example, from U.S. Pat. No. 5,296,891 and U.S. Pat. No. 5,523,193, and PCT patent applications WO 98/38597 and WO 98/33096, which are incorporated herein by reference. In the case of a programmable mirror array, the support structure may be embodied as a frame or table, for example, which may be fixed or movable as required; and                A programmable LCD array. An example of such a construction is given in U.S. Pat. No. 5,229,872, which is incorporated herein by reference. As above, the support structure in this case may be embodied as a frame or table, for example, which may be fixed or movable as required.        
For purposes of simplicity, the rest of this text may, at certain locations, specifically direct itself to examples involving a mask and mask table. However, the general principles discussed in such instances should be seen in the broader context of the patterning device as set forth here above.
Lithographic projection apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In that case, the patterning device may generate a circuit pattern corresponding to an individual layer of the IC. This pattern can be imaged onto a target portion (e.g. comprising one or more dies) of a substrate (silicon wafer) that has been coated with a layer of radiation-sensitive material (resist). In general, a single wafer will contain a whole network of adjacent target portions that are successively irradiated via the projection system, one at a time. In current apparatus that employ patterning by a mask on a mask table, a distinction can be made between two different types of machines. In one type of lithographic projection apparatus, each target portion is irradiated by exposing the entire mask pattern onto the target portion in one exposure. Such an apparatus is commonly referred to as a wafer stepper or step-and-repeat apparatus.
In an alternative apparatus, commonly referred to as a step-and-scan apparatus, each target portion is irradiated by progressively scanning the mask pattern under the projection beam in a given reference direction (the “scanning” direction), while synchronously scanning the substrate table parallel or anti-parallel to this direction. Since, in general, the projection system will have a magnification factor M (generally <1), the speed V at which the substrate table is scanned will be a factor M times that at which the mask table is scanned. More information with regard to lithographic devices as here described can be gleaned, for example, from U.S. Pat. No. 6,046,792, incorporated herein by reference.
In a manufacturing process using a lithographic projection apparatus, a pattern (e.g. in a mask) is imaged onto a substrate that is at least partially covered by a layer of radiation-sensitive material (resist). Prior to this imaging step, the substrate may undergo various procedures, such as priming, resist coating and a soft bake. After exposure, the substrate may be subjected to other procedures, such as a post-exposure bake (PEB), development, a hard bake and measurement/inspection of the imaged features. This array of procedures is used as a basis to pattern an individual layer of a device, e.g. an integrated circuit (IC). Such a patterned layer may then undergo various processes such as etching, ion-implantation (doping), metallization, oxidation, chemical-mechanical polishing, etc., all intended to finish off an individual layer. If several layers are required, then the whole procedure, or a variant thereof, will have to be repeated for each new layer. Eventually, an array of devices will be present on the substrate (wafer). These devices are then separated from one another by a technique such as dicing or sawing, whence the individual devices can be mounted on a carrier, connected to pins, etc. Further information regarding such processes can be obtained, for example, from the book “Microchip Fabrication: A Practical Guide to Semiconductor Processing”, Third Edition, by Peter van Zant, McGraw Hill Publishing Co., 1997, ISBN 0-07-067250-4, incorporated herein by reference.
For the sake of simplicity, the projection system may hereinafter be referred to as the “lens”. However, this term should be broadly interpreted as encompassing various types of projection system, including refractive optics, reflective optics, and catadioptric systems, for example. The radiation system may also include components operating according to any of these design types for directing, shaping or controlling the projection beam of radiation, and such components may also be referred to below, collectively or singularly, as a “lens”.
Furthermore, the lithographic apparatus may be of a type having two or more substrate tables (and/or two or more mask tables). In such “multiple stage” devices the additional tables may be used in parallel, or preparatory steps may be carried out on one or more tables while one or more other tables are being used for exposures. Dual stage lithographic apparatus are described, for example, in U.S. Pat. No. 5,969,441 and WO 98/40791, both incorporated herein by reference.
Although specific reference may be made in this text to the use of the apparatus according to the invention in the manufacture of integrated circuits, it should be explicitly understood that such an apparatus has many other possible applications. For example, it may be employed in the manufacture of integrated optical systems, guidance and detection patterns for magnetic domain memories, liquid-crystal display panels, thin-film magnetic heads, etc. The person skilled in the art will appreciate that, in the context of such alternative applications, any use of the terms “reticle”, “wafer” or “die” in this text should be considered as being replaced by the more general terms “mask”, “substrate” and “target portion”, respectively.
In this document, the terms “radiation” and “projection beam” are used to encompass all types of electromagnetic radiation, including ultraviolet (UV) radiation (e.g. with a wavelength of 365, 248, 193, 157 or 126 nm) and extreme ultra-violet (EUV) radiation (e.g. having a wavelength in the range 5-20 nm), among others.
For lithographic processing, the location of patterns in subsequent layers on the wafer should be as precise as possible for a correct definition of device features on the substrate, which features all should have sizes within specified tolerances. The overlay should be within well-defined tolerances for creating functional devices. To this end, the lithographic projection apparatus comprises an overlay measurement module which provides for determining the overlay of a pattern on the substrate with a mask pattern, as defined in a resist layer on top of the pattern.
The overlay system typically performs the measurement by optical elements. The position of the mask pattern relative to the position of the pattern located on the substrate is determined by measuring an optical response from an optical marker that is illuminated by an optical source. The signal generated by the optical marker is measured by a sensor arrangement. The overlay may be derived from output of the sensors.
Optical markers are used during microelectronic device processing (or IC processing) along the full manufacturing line. During the front end of line (FEOL), markers are used for overlay during manufacturing of transistor structures, for example. At a later stage during the back end of line (BEOL), markers are needed for overlay of metallization structures, e.g. connect lines, and vias. It is noted that in both cases, the integrity of the markers should be sufficient to meet the required accuracy of overlay.
In conventional systems, marker structures for overlay control are present in some area(s) of a substrate to allow for controlling the overlay of a mask pattern in a resist layer (after exposure and development), with further patterns already present on the substrate. A known structure for overlay control is a so-called overlay metrology target, which may include a first structure having four rectangular blocks and constituent parts that are arranged with their length along one of the sides of an imaginary square, and a second structure similar to, but smaller than, the first structure. To determine the overlay of patterns in two successive layers, one of the first and second structures is defined in the pattern in the first successive layer and the other one of the first and second structures is defined in the pattern in the resist layer for the second successive layer. In use, for both of the first and second structures, the position (e.g., the gravity centre) is determined for example, by detection of the edges of the respective rectangular blocks within the first and second structures, or using a correlation technique with respect to a reference target. From the difference in the centre of gravity position of the first and second structures, the overlay of the two structures is determined. It is noted that in conventional systems, other overlay metrology targets, such as a box-in-box target, are also known.
It is generally recognized that, for proper processing, the constituent parts of a marker structure should include a same material as (parts of) the device features and the dimensions should be similar to the dimensions of features of microelectronic devices. Maintaining similar dimensions avoids size-induced deviations that occur during processing of integrated circuits, which may result from a micro-loading effect during a reactive ion etching process. Size-induced deviations may occur at device structures that are in the vicinity of a large marker area or may result from size dependency of chemical-mechanical polishing (CMP) of structures.
U.S. Pat. No. 5,917,205 discloses photo-lithographic alignment marks based on circuit pattern features. Alignment marker structures are mimicked by a plurality of sub-elements which are ordered in such a way that their envelope corresponds to the marker structure. Furthermore, each sub-element has dimensions comparable to a critical feature size of a microelectronic device. Basically, the solution to marker size induced processing deviations is to “chop up” a large marker into many small-sized sub-elements which resemble features of a device (or “product”). Other drawbacks exist with known systems.
Overlay control may be improved using a system and method of measuring a location of an aerial image of an object mark in space.